TY - JOUR
T1 - A CMOS low noise, chopper stabilized low-dropout regulator with current-mode feedback error amplifier
AU - Oh, Wonseok
AU - Bakkaloglu, Bertan
AU - Wang, Chris
AU - Hoon, Siew K.
N1 - Funding Information:
Manuscript received March 24, 2008; revised February 11, 2008. First published April 18, 2008; current version published November 21, 2008. This work was supported by Connection One Center, an NSF/Industry University Cooperative Research Center under Contract DWS0141. This paper was recommended by Associate Editor J. S. Chang. W. Oh is with the RF Micro Devices, Inc. Chandler, AZ 85226 USA. B. Bakkaloglu is with Arizona State University, Tempe, AZ 85287 USA (e-mail: bertan@asu.edu). C. Wang is with Texas Instruments Incorporated, Tucson, AZ 85707 USA (e-mail: wang_chris@ti.com). S. K. Hoon was with Texas Instruments Incorporated, Dallas, TX 75243 USA. He is now with National Semiconductor Corporation, Santa Clara, CA 95052-8090 USA (email: siew.hoon@nsc.com). Digital Object Identifier 10.1109/TCSI.2008.923278
PY - 2008
Y1 - 2008
N2 - Low 1/f noise, low-dropout (LDO) regulators are becoming critical for the supply regulation of deep-submicron analog baseband and RF system-on-chip designs. A low-noise, high accuracy LDO regulator (LN-LDO) utilizing a chopper stabilized error amplifier is presented. In order to achieve fast response during load transients, a current-mode feedback amplifier (CFA) is designed as a second stage driving the regulation FET. In order to reduce clock feed-through and 1/f noise accumulation at the chopping frequency, a first-order digital ΣΔ noise-shaper is used for chopping clock spectral spreading. With up to 1 MHz noise-shaped modulation clock, the LN-LDO achieves a noise spectral density of 32 nV/√Hz and a PSR of 38 dB at 100 kHz. The proposed LDO is shown to reduce the phase noise of an integrated 32 MHz temperature compensated crystal oscillator (TCXO) at 10 kHz offset by 15 dB. Due to reduced 1/f noise requirements, the error amplifier silicon area is reduced by 75%, and the overall regulator area is reduced by 50% with respect to an equivalent noise static regulator. The current-mode feedback second stage buffer reduces regulator settling time by 60% in comparison to an equivalent power consumption voltage mode buffer, achieving 0.6 μs settling time for a 25-mA load step. The LN-LDO is designed and fabricated on a 0.25 μm CMOS process with five layers of metal, occupying 0.88 mm2.
AB - Low 1/f noise, low-dropout (LDO) regulators are becoming critical for the supply regulation of deep-submicron analog baseband and RF system-on-chip designs. A low-noise, high accuracy LDO regulator (LN-LDO) utilizing a chopper stabilized error amplifier is presented. In order to achieve fast response during load transients, a current-mode feedback amplifier (CFA) is designed as a second stage driving the regulation FET. In order to reduce clock feed-through and 1/f noise accumulation at the chopping frequency, a first-order digital ΣΔ noise-shaper is used for chopping clock spectral spreading. With up to 1 MHz noise-shaped modulation clock, the LN-LDO achieves a noise spectral density of 32 nV/√Hz and a PSR of 38 dB at 100 kHz. The proposed LDO is shown to reduce the phase noise of an integrated 32 MHz temperature compensated crystal oscillator (TCXO) at 10 kHz offset by 15 dB. Due to reduced 1/f noise requirements, the error amplifier silicon area is reduced by 75%, and the overall regulator area is reduced by 50% with respect to an equivalent noise static regulator. The current-mode feedback second stage buffer reduces regulator settling time by 60% in comparison to an equivalent power consumption voltage mode buffer, achieving 0.6 μs settling time for a 25-mA load step. The LN-LDO is designed and fabricated on a 0.25 μm CMOS process with five layers of metal, occupying 0.88 mm2.
KW - Chopper stabilization
KW - Current feedback amplifier
KW - Low-dropout regulators
KW - Power supply rejection
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U2 - 10.1109/TCSI.2008.923278
DO - 10.1109/TCSI.2008.923278
M3 - Article
AN - SCOPUS:57149135756
SN - 1057-7122
VL - 55
SP - 3006
EP - 3015
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 10
ER -