A CMOS-compatible high aspect ratio silicon-on-glass in-plane micro-accelerometer

Junseok Chae, Haluk Kulah, Khalil Najafi

Research output: Contribution to journalArticle

47 Scopus citations

Abstract

This paper presents a post-CMOS-compatible micro-machined silicon-on-glass (SOG) in-plane capacitive accelerometer. The accelerometer is a high aspect ratio structure with a 120 μm thick single-crystal silicon proof-mass and 3.4 μm sense gap, bonded to a glass substrate. It is fabricated using a simple 3-mask, 5-step process, and is fully CMOS compatible. A CMOS switched-capacitor readout circuit and an oversampled Σ-Δ modulator are used to read out capacitance changes from the accelerometer. The CMOS chip is 2.6 × 2.4 mm2 in size, utilizes chopper stabilization and correlated double sampling techniques, has a 106 dB open-loop dynamic range, a low input offset of 370 μV, and can resolve better than 20 aF. The accelerometer system has a measured sensitivity of 40 mV g-1 and input referred noise density of 79 μg Hz-1/2. Using the SOG configuration, a post-CMOS monolithic integration technique is developed. The integration technique utilizes dielectric bridges, silicon islands and the SOG configuration to obtain a simple, robust and post-CMOS-compatible process. Utilizing this technique, an integrated SOG accelerometer has been fabricated using the University of Michigan 3 μm CMOS process.

Original languageEnglish (US)
Pages (from-to)336-345
Number of pages10
JournalJournal of Micromechanics and Microengineering
Volume15
Issue number2
DOIs
StatePublished - Feb 1 2005

    Fingerprint

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Mechanics of Materials
  • Mechanical Engineering
  • Electrical and Electronic Engineering

Cite this