TY - GEN
T1 - A CMOS 1.5-bit ΣΔ digital IF to RF transmitter for WCDMA application
AU - Han, Yongping
AU - Taleie, Shahin Mehdizad
AU - Copani, Tino
AU - Bakkaloglu, Bertan
AU - Kiaei, Sayfe
PY - 2011/12/1
Y1 - 2011/12/1
N2 - A digital intermediate frequency (IF) to RF transmitter targeted for 2GHz wideband code division multiple access (WCDMA) is presented. The proposed transmitter integrates a 3-level digital IF current-steering cell, an up-conversion mixer with a tuned load and an RF variable gain amplifier (RF VGA) with an embedded semi-digital finite impulse response (FIR) reconstruction filter. A 4th-order 1.5-b IF bandpass sigma delta modulator (BP ΣΔM) is designed to guarantee in-band signal-to-noise ratio (SNR) and error vector magnitude (EVM) performances while the out-of-band quantization noise due to noise shaping is suppressed by the embedded FIR reconstruction filter to meet spectrum emission mask and ACPR requirements. The on-chip RF VGA provides 50dB power scaling in 10-dB steps with less than 1dB gain error. Together with the power control at the ΣΔM stage, the 74-dB dynamic range at RF frequency is achieved. The design is fabricated in a 4-metal 0.18-μm CMOS technology with a total core area of 0.8 × 1.6 mm 2. The IC delivers 0dBm output power to the 50Ω load at 2GHz and it draws approximately 120mA from a 1.8V DC supply at the maximum output power.
AB - A digital intermediate frequency (IF) to RF transmitter targeted for 2GHz wideband code division multiple access (WCDMA) is presented. The proposed transmitter integrates a 3-level digital IF current-steering cell, an up-conversion mixer with a tuned load and an RF variable gain amplifier (RF VGA) with an embedded semi-digital finite impulse response (FIR) reconstruction filter. A 4th-order 1.5-b IF bandpass sigma delta modulator (BP ΣΔM) is designed to guarantee in-band signal-to-noise ratio (SNR) and error vector magnitude (EVM) performances while the out-of-band quantization noise due to noise shaping is suppressed by the embedded FIR reconstruction filter to meet spectrum emission mask and ACPR requirements. The on-chip RF VGA provides 50dB power scaling in 10-dB steps with less than 1dB gain error. Together with the power control at the ΣΔM stage, the 74-dB dynamic range at RF frequency is achieved. The design is fabricated in a 4-metal 0.18-μm CMOS technology with a total core area of 0.8 × 1.6 mm 2. The IC delivers 0dBm output power to the 50Ω load at 2GHz and it draws approximately 120mA from a 1.8V DC supply at the maximum output power.
KW - Digital IF
KW - Digital to analog converters (DACs)
KW - Digital transmitter
KW - RF variable gain amplifier (RF VGA)
KW - Sigma-delta modulator (ΣΔM)
KW - Wideband code division multiple access (WCDMA)
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UR - http://www.scopus.com/inward/citedby.url?scp=84872590245&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84872590245
SN - 9781618392794
T3 - IMEKO TC4 International Workshop on ADC Modelling, Testing and Data Converter Analysis and Design 2011, IWADC 2011 and IEEE 2011 ADC Forum
SP - 191
EP - 196
BT - IMEKO TC4 International Workshop on ADC Modelling, Testing and Data Converter Analysis and Design 2011, IWADC 2011 and IEEE 2011 ADC Forum
T2 - IMEKO TC4 International Workshop on ADC Modelling, Testing and Data Converter Analysis and Design 2011, IWADC 2011 and IEEE 2011 ADC Forum
Y2 - 30 June 2011 through 1 July 2011
ER -