The purpose of this paper is to introduce digital predistortion and propose a new digital predistortion scheme for use in systems with lengthy transmit-receive delays. The introduction discusses the motivation to implement digital predistortion within a wireless transceiver system. Then, we introduce techniques commonly found in the literature and the assumptions made in their operation. Finally, a new scheme is proposed which allows consideration of multiple measurements of actual data between predistorter updates. This is beneficial when there is a significant latency after each update before new results can be measured. This new scheme utilizes a block least-mean-squares algorithm, running within a gain-based look-up-table predistorter. The proposed scheme demonstrates a reduction in the time required for power amplifier linearization.