A 90-nm radiation hardened clock spine

Srivatsan Chellappa, Lawrence T. Clark, Keith Holbert

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

A RHBD clock distribution network is described that reliably synchronizes the flow of signals through an integrated circuit in the presence of SETs. The clock spine design controls both redundant and non-redundant hardened circuits. The design uses techniques to reduce the jitter due to SETs, as well as error detection at every clock edge, since errors may be in the clock gating enables rather than the clocks themselves. The clock spine has been fabricated and tested on both standard and a low power 90-nm test chips, and proven hard as demonstrated by both heavy ion and proton broad beam testing.

Original languageEnglish (US)
Title of host publicationRADECS 2011 - 12th European Conference on Radiation and Its Effects on Component and Systems, Conference Proceedings
Pages479-484
Number of pages6
DOIs
StatePublished - 2011
Event12th European Conference on Radiation and Its Effects on Component and Systems, RADECS 2011 - Sevilla, Spain
Duration: Sep 19 2011Sep 23 2011

Publication series

NameProceedings of the European Conference on Radiation and its Effects on Components and Systems, RADECS

Other

Other12th European Conference on Radiation and Its Effects on Component and Systems, RADECS 2011
Country/TerritorySpain
CitySevilla
Period9/19/119/23/11

Keywords

  • Radiation hardening by design
  • clock generation
  • single event transients
  • single event upset

ASJC Scopus subject areas

  • Radiation
  • Electrical and Electronic Engineering

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