A 6 A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter With ±1.5% Frequency and ±3.6% Current-Sharing Error

Ming Sun, Zhe Yang, Kishan Joshi, Debashis Mandal, Philippe Adell, Bertan Bakkaloglu

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

A four-phase, quasi-current-mode hysteretic buck converter with digital frequency synchronization, online comparator offset-calibration and, digital current-sharing control is presented. The switching frequency of the hysteretic converter is digitally synchronized to the input clock reference with less than ± 1.5% error in the switching frequency range of 3-9.5 MHz. The online offset calibration cancels the input-referred offset of the hysteretic comparator and enables ± 1.1% voltage regulation accuracy. Maximum current-sharing error of ± 3.6% is achieved by a duty-cycle-calibrated delay line-based pulsewidth modulation generator, without affecting the phase synchronization timing sequence. In light-load conditions, individual converter phases can be disabled, and the final stage power converter output stage is segmented for high efficiency. The dc-dc converter achieves 93% peak efficiency for Vi= 2 V and Vo= 1.6 V.

Original languageEnglish (US)
JournalIEEE Journal of Solid-State Circuits
DOIs
StateAccepted/In press - Sep 13 2017

Fingerprint

Switching frequency
Synchronization
Calibration
Electric delay lines
Power converters
Voltage control
Clocks
Modulation

Keywords

  • Auto zero
  • current sharing
  • dc-dc converter
  • digital frequency synchronization (DFS)
  • duty-cycle-calibrated delay line (DCC-DL)
  • hysteretic control
  • multi-phase buck converter
  • online offset calibration
  • phase synchronization
  • quasi-current mode
  • switching power supply.

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

@article{cef7f433799941649c898d3d151ac8c0,
title = "A 6 A, 93{\%} Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter With ±1.5{\%} Frequency and ±3.6{\%} Current-Sharing Error",
abstract = "A four-phase, quasi-current-mode hysteretic buck converter with digital frequency synchronization, online comparator offset-calibration and, digital current-sharing control is presented. The switching frequency of the hysteretic converter is digitally synchronized to the input clock reference with less than ± 1.5{\%} error in the switching frequency range of 3-9.5 MHz. The online offset calibration cancels the input-referred offset of the hysteretic comparator and enables ± 1.1{\%} voltage regulation accuracy. Maximum current-sharing error of ± 3.6{\%} is achieved by a duty-cycle-calibrated delay line-based pulsewidth modulation generator, without affecting the phase synchronization timing sequence. In light-load conditions, individual converter phases can be disabled, and the final stage power converter output stage is segmented for high efficiency. The dc-dc converter achieves 93{\%} peak efficiency for Vi= 2 V and Vo= 1.6 V.",
keywords = "Auto zero, current sharing, dc-dc converter, digital frequency synchronization (DFS), duty-cycle-calibrated delay line (DCC-DL), hysteretic control, multi-phase buck converter, online offset calibration, phase synchronization, quasi-current mode, switching power supply.",
author = "Ming Sun and Zhe Yang and Kishan Joshi and Debashis Mandal and Philippe Adell and Bertan Bakkaloglu",
year = "2017",
month = "9",
day = "13",
doi = "10.1109/JSSC.2017.2744618",
language = "English (US)",
journal = "IEEE Journal of Solid-State Circuits",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - A 6 A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter With ±1.5% Frequency and ±3.6% Current-Sharing Error

AU - Sun, Ming

AU - Yang, Zhe

AU - Joshi, Kishan

AU - Mandal, Debashis

AU - Adell, Philippe

AU - Bakkaloglu, Bertan

PY - 2017/9/13

Y1 - 2017/9/13

N2 - A four-phase, quasi-current-mode hysteretic buck converter with digital frequency synchronization, online comparator offset-calibration and, digital current-sharing control is presented. The switching frequency of the hysteretic converter is digitally synchronized to the input clock reference with less than ± 1.5% error in the switching frequency range of 3-9.5 MHz. The online offset calibration cancels the input-referred offset of the hysteretic comparator and enables ± 1.1% voltage regulation accuracy. Maximum current-sharing error of ± 3.6% is achieved by a duty-cycle-calibrated delay line-based pulsewidth modulation generator, without affecting the phase synchronization timing sequence. In light-load conditions, individual converter phases can be disabled, and the final stage power converter output stage is segmented for high efficiency. The dc-dc converter achieves 93% peak efficiency for Vi= 2 V and Vo= 1.6 V.

AB - A four-phase, quasi-current-mode hysteretic buck converter with digital frequency synchronization, online comparator offset-calibration and, digital current-sharing control is presented. The switching frequency of the hysteretic converter is digitally synchronized to the input clock reference with less than ± 1.5% error in the switching frequency range of 3-9.5 MHz. The online offset calibration cancels the input-referred offset of the hysteretic comparator and enables ± 1.1% voltage regulation accuracy. Maximum current-sharing error of ± 3.6% is achieved by a duty-cycle-calibrated delay line-based pulsewidth modulation generator, without affecting the phase synchronization timing sequence. In light-load conditions, individual converter phases can be disabled, and the final stage power converter output stage is segmented for high efficiency. The dc-dc converter achieves 93% peak efficiency for Vi= 2 V and Vo= 1.6 V.

KW - Auto zero

KW - current sharing

KW - dc-dc converter

KW - digital frequency synchronization (DFS)

KW - duty-cycle-calibrated delay line (DCC-DL)

KW - hysteretic control

KW - multi-phase buck converter

KW - online offset calibration

KW - phase synchronization

KW - quasi-current mode

KW - switching power supply.

UR - http://www.scopus.com/inward/record.url?scp=85030328487&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85030328487&partnerID=8YFLogxK

U2 - 10.1109/JSSC.2017.2744618

DO - 10.1109/JSSC.2017.2744618

M3 - Article

AN - SCOPUS:85030328487

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

SN - 0018-9200

ER -