A 6 A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter with ±1.5% Frequency and ±3.6% Current-Sharing Error

Ming Sun, Zhe Yang, Kishan Joshi, Debashis Mandal, Philippe Adell, Bertan Bakkaloglu

Research output: Contribution to journalArticlepeer-review

9 Scopus citations

Abstract

A four-phase, quasi-current-mode hysteretic buck converter with digital frequency synchronization, online comparator offset-calibration and, digital current-sharing control is presented. The switching frequency of the hysteretic converter is digitally synchronized to the input clock reference with less than ±1.5% error in the switching frequency range of 3-9.5 MHz. The online offset calibration cancels the input-referred offset of the hysteretic comparator and enables ±1.1% voltage regulation accuracy. Maximum current-sharing error of ±3.6% is achieved by a duty-cycle-calibrated delay line-based pulsewidth modulation generator, without affecting the phase synchronization timing sequence. In light-load conditions, individual converter phases can be disabled, and the final stage power converter output stage is segmented for high efficiency. The DC-DC converter achieves 93% peak efficiency for Vi= 2 V and Vo= 1.6 V.

Original languageEnglish (US)
Article number8036402
Pages (from-to)3081-3094
Number of pages14
JournalIEEE Journal of Solid-State Circuits
Volume52
Issue number11
DOIs
StatePublished - Nov 2017

Keywords

  • Auto zero
  • DC-DC converter
  • current sharing
  • digital frequency synchronization (DFS)
  • duty-cycle-calibrated delay line (DCC-DL)
  • hysteretic control
  • multi-phase buck converter
  • online offset calibration
  • phase synchronization
  • quasi-current mode
  • switching power supply

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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