Abstract
A fully integrated digital low-dropout regulator (DLDO) with a fast transient response, providing a regulated supply for system-on-chip (SoC) power management applications is proposed. Wideband operation and fast transient response are achieved through a transient enhanced proportional-integral controller, without compromising the stability of the DLDO at steady-state operation. The transient enhancement stage boosts loop-gain dynamically during load transients. In the gain boosting mode, the DLDO closed-loop bandwidth is increased, resulting in reduced undershoot/overshoot and fast settling. When the output voltage recovers to the desired level, the boost mode operation is disabled. For a load change with a 4-mA/ns slew rate between 10 and 50 mA, utilizing transient enhancement mode reduced the measured undershoot and overshoot by 35% and 17%, respectively. The characterization results show that the transient enhancement mode can reduce the settling time from 500 to 250 ns for a 10-50-mA load current change. The proposed DLDO operates with an input voltage ranging from 0.84 to 1.24 V, and output voltage ranging from 0.6 to 1 V. The maximum output current of the DLDO is 50 mA and the DLDO achieves a peak current efficiency of 99.2%, with DLDO figure of merit (FOM2) of 63.25 ps. The DLDO prototype chip is fabricated on a 0.13-μm CMOS technology and occupies a 0.0631-mm2 die area.
Original language | English (US) |
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Article number | 7889005 |
Pages (from-to) | 2360-2370 |
Number of pages | 11 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 25 |
Issue number | 8 |
DOIs | |
State | Published - Aug 2017 |
Keywords
- Digital control
- digital low dropout regulator (DLDO)
- fast transient
- transient enhanced proportional-integral (PI) controller
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering