Abstract
A 24GHz digitally modulated polar power amplifier (PA) is proposed. A digital amplitude control word (ACW) is generated from a 1.5-bit first-order ΣΔ ADC, reducing the number of unary PA cells compared to Nyquist approaches. The power combiner and the digitally-controlled PA cells form an embedded finite impulse response (FIR) filter suppressing out of band quantization noise caused by the ADC. The PA is designed using a 90nm CMOS process and it achieves 15dBm maximum output power while drawing 100mA from 1.2V supply. A 27% drain efficiency (DE) is achieved while a -22dB error vector magnitude (EVM) is obtained with a 50MHz BW, 16-QAM OFDM signal. The proposed architecture can perform digital-to-RF conversion, FIR filtering, and power amplification simultaneously.
Original language | English (US) |
---|---|
Title of host publication | 6th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2010 |
State | Published - Nov 11 2010 |
Event | 6th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2010 - Berlin, Germany Duration: Jul 18 2010 → Jul 21 2010 |
Publication series
Name | 6th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2010 |
---|
Other
Other | 6th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2010 |
---|---|
Country/Territory | Germany |
City | Berlin |
Period | 7/18/10 → 7/21/10 |
Keywords
- CMOS
- Polar modulation
- Power amplifiers
- Transformers
ASJC Scopus subject areas
- Electrical and Electronic Engineering