A 24-μW 11-bit 1-MS/s SAR ADC with a bidirectional single-side switching technique

Long Chen, Arindam Sanyal, Ji Ma, Nan Sun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

53 Scopus citations

Abstract

This paper presents a low-power SAR ADC with a bidirectional single-side (BSS) switching technique. It reduces the DAC reference power and the total number of unit capacitors by 86% and 75% respectively, compared to the conventional SAR switching technique. It also minimizes the DAC switch driving power as it has only 1 single-side switching event every comparison cycle. Unlike the existing monotonic switching technique that also has only 1 switching event, the comparator input common-mode voltage for the proposed technique does not converge to ground but to Vcm, and thus, obviates the need for a specially designed comparator. To further reduce power, a segmented common-centroid capacitor layout is developed to ensure good matching accuracy. An 11-bit prototype ADC fabricated in 0.18-μm 1P6M CMOS technology achieves an ENOB of 10.3 bits and an SFDR of 77 dB. Operating at 1 MS/s, it consumes only 24 μW from a 1V power supply, leading to a FOM of 19.9 fJ/conv-step.

Original languageEnglish (US)
Title of host publicationESSCIRC 2014 - Proceedings of the 40th European Solid-State Circuit Conference
EditorsPietro Andreani, Andrea Bevilacqua, Gaudenzio Meneghesso
PublisherIEEE Computer Society
Pages219-222
Number of pages4
ISBN (Electronic)9781479956944
DOIs
StatePublished - Oct 31 2014
Externally publishedYes
Event40th European Solid-State Circuit Conference, ESSCIRC 2014 - Venezia Lido, Italy
Duration: Sep 22 2014Sep 26 2014

Publication series

NameEuropean Solid-State Circuits Conference
ISSN (Print)1930-8833

Conference

Conference40th European Solid-State Circuit Conference, ESSCIRC 2014
Country/TerritoryItaly
CityVenezia Lido
Period9/22/149/26/14

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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