A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process

Bertan Bakkaloglu, Paul Fontaine, Ahmed Nader Mohieldin, Solti Peng, Sher Jiun Fang, Fikret Dülger

Research output: Contribution to journalArticle

21 Scopus citations

Abstract

A single chip quad-band multi-mode (GSM900/ DCS1800/PCS1900/CDMA2K) direct-conversion RF receiver with integrated baseband ADCs is presented. The fully integrated RF receiver is implemented in a 90-nm single poly, six level metal, standard digital CMOS process with no additional analog and RF components. The highly digital multi-mode receiver uses minimum analog filtering and AGC stages, digitizing useful signal, dynamic DC offsets and blockers at the mixer output. The direct-conversion GSM front-end utilizes resistive loaded LNAs with only two coupled inductors per LNA. The GSM front-end achieves a 31.5 dB gain and a 2.1 dB integrated noise figure with a 5 dB noise figure under blocking conditions. The CDMA2K front-end utilizes a self-biased common-gate input amplifier followed by passive mixers, achieving wideband input matching from 900 MHz up to 2.1 GHz with an IIP3 of +8 dBm. The GSM receiver consumes 38 mA from a power supply of 1.5 V and CDMA2K receiver consumes 16 mA in the low band and 21 mA in the high band. The multi-mode receiver, including LO buffers and frequency dividers, ADCs, and reference buffers, occupies 2.5 mm 2.

Original languageEnglish (US)
Pages (from-to)1149-1158
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Volume41
Issue number5
DOIs
StatePublished - May 1 2006

Keywords

  • CMOS integrated circuits
  • Low-noise amplifier
  • Multimode
  • Radio frequency integrated circuits
  • Transceivers
  • Wireless

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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