A 1.06 μw smart ECG processor in 65 nm CMOS for real-time biometrie authentication and personal cardiac monitoring

Shihui Yin, Minkyu Kim, Deepak Kadetotad, Yang Liu, Chisung Bae, Sang Joon Kim, Yu Cao, Jae-sun Seo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Scopus citations

Abstract

A smart wearable electrocardiographic (ECG) processor is presented for secure ECG-based biometric authentication and cardiac monitoring, including arrhythmia and anomaly detection. Data-driven Lasso regression and low-precision techniques are developed to compress the neural networks by 24.4X. The prototype chip fabricated in 65 nm LP CMOS consumes 1.06 μW at 0.55 V for real-time ECG authentication. Equal error rates of 0.74% and 1.7% are achieved on ECG-ID database and in-house 645-subject database, respectively.

Original languageEnglish (US)
Title of host publication2017 Symposium on VLSI Circuits, VLSI Circuits 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesC102-C103
ISBN (Electronic)9784863486065
DOIs
StatePublished - Aug 10 2017
Event31st Symposium on VLSI Circuits, VLSI Circuits 2017 - Kyoto, Japan
Duration: Jun 5 2017Jun 8 2017

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other31st Symposium on VLSI Circuits, VLSI Circuits 2017
CountryJapan
CityKyoto
Period6/5/176/8/17

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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