A 0.13-μm CMOS ultra-low power front-end receiver for wireless sensor networks

Wenjian Chen, Tino Copani, Hugh Barnaby, Sayfe Kiaei

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

This paper presents an ultra-low power monolithic CMOS RF receiver, consisting of current re-use common gate LNA with inductive feedback g m-boosting, and followed by balanced I/Q mixers. The receiver is fabricated in a 0.13-μm CMOS digital process operating at 2.45 GHZ. The measurement results show that the RF receiver achieves a gain of 20 dB and a noise figure of 7.5 dB at 2 MHz. Input 1-dB compression point is -19 dBm and IIP3 is -10 dBm, with 0.4 mA total current consumption from a 1.5-V supply.

Original languageEnglish (US)
Title of host publicationProceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
Pages105-108
Number of pages4
DOIs
StatePublished - Oct 2 2007
Event2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007 - Honolulu, HI, United States
Duration: Jun 3 2007Jun 5 2007

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN (Print)1529-2517

Other

Other2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
CountryUnited States
CityHonolulu, HI
Period6/3/076/5/07

Keywords

  • Current reuse
  • Low noise amplifier (LNA)
  • Low power
  • Mixer
  • Noise figure
  • Transformer feedback

ASJC Scopus subject areas

  • Engineering(all)

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