8.6fJ/step VCO-Based CT 2nd-Order ΔΣ ADC

Akshay Jayaraj; Abhijit Das; Srinivas Arcot; Arindam Sanyal

doi:10.1109/A-SSCC47793.2019.9056932

8.6fJ/step VCO-Based CT 2^nd-Order ΔΣ ADC

Akshay Jayaraj, Abhijit Das, Srinivas Arcot, Arindam Sanyal

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Scopus citations

Abstract

A purely VCO-based continuous-time (CT), single-loop second-order ΔΣ ADC is proposed in this work. Two ring oscillators are used as integrators to perform second-order quantization noise shaping. The proposed CT ADC does not require additional circuit for excess loop delay compensation. A current-reuse DAC architecture is proposed to simultaneously reduce ADC noise and power consumption. A 65nm prototype consumes 105 μW from 1V supply at sampling frequency of 32.6MHz, and achieves a walden FoM of 8.6fJ/step over 2.3MHz bandwidth, which is the best among current CT ΔΣ ADCs.

Original language	English (US)
Title of host publication	Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	197-200
Number of pages	4
ISBN (Electronic)	9781728151069
DOIs	https://doi.org/10.1109/A-SSCC47793.2019.9056932
State	Published - Nov 2019
Externally published	Yes
Event	15th IEEE Asian Solid-State Circuits Conference, A-SSCC 2019 - Macao, China Duration: Nov 4 2019 → Nov 6 2019

Publication series

Name	Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019

Conference

Conference	15th IEEE Asian Solid-State Circuits Conference, A-SSCC 2019
Country/Territory	China
City	Macao
Period	11/4/19 → 11/6/19

Keywords

analog-to-digital converter
continuous-time ADC
delta-sigma
voltage-controlled oscillator

ASJC Scopus subject areas

Computer Networks and Communications
Hardware and Architecture
Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/A-SSCC47793.2019.9056932

Cite this

Jayaraj, A., Das, A., Arcot, S., & Sanyal, A. (2019). 8.6fJ/step VCO-Based CT 2^nd-Order ΔΣ ADC. In Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019 (pp. 197-200). Article 9056932 (Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/A-SSCC47793.2019.9056932

8.6fJ/step VCO-Based CT 2^nd-Order ΔΣ ADC. / Jayaraj, Akshay; Das, Abhijit; Arcot, Srinivas et al.
Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 197-200 9056932 (Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Jayaraj, A, Das, A, Arcot, S & Sanyal, A 2019, 8.6fJ/step VCO-Based CT 2^nd-Order ΔΣ ADC. in Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019., 9056932, Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Institute of Electrical and Electronics Engineers Inc., pp. 197-200, 15th IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macao, China, 11/4/19. https://doi.org/10.1109/A-SSCC47793.2019.9056932

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