3D RRAM: Design and optimization

Jinfeng Kang, Bin Gao, B. Chen, P. Huang, F. F. Zhang, Y. X. Deng, L. F. Liu, X. Y. Liu, H. Y. Chen, Z. Jiang, Shimeng Yu, H. S Philip Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

A novel vertical RRAM for 3D cross-point architecture is proposed. The design and optimization issues of the proposed vertical RRAM for 3D cross-point architecture array are addressed from both device and array levels. A double layer stacked HfOx based vertical RRAM devices with interface engineering fabricated using a cost-effective fabrication process. The excellent performances such as low reset current, fast switching speed, high switching endurance and disturbance immunity, good retention and self-selectivity are demonstrated in the fabricated HfOx based vertical RRAM devices. The opimized design guidances for the 3D cross-point architecture array are presented.

Original languageEnglish (US)
Title of host publicationProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
EditorsJia Zhou, Ting-Ao Tang
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479932962
DOIs
StatePublished - Jan 23 2014
Event2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014 - Guilin, China
Duration: Oct 28 2014Oct 31 2014

Publication series

NameProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014

Other

Other2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
Country/TerritoryChina
CityGuilin
Period10/28/1410/31/14

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Computer Science Applications

Fingerprint

Dive into the research topics of '3D RRAM: Design and optimization'. Together they form a unique fingerprint.

Cite this