3D ensemble Monte Carlo device simulations of random trap induced degradation in drain current and in threshold voltage in the presence of random dopant distributions for 45 nm gate length MOSFETs

Nabil Ashraf, Dragica Vasileska

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

We investigate the influence of a single trap and two traps in close proximity located at the semiconductor/oxide interface (positioned in the middle portion of the gate width and gradually moved from the source end to the drain end of the channel). We find that when the trap is located at the source end of the channel, the threshold voltage and the magnitude of the drain current are dominated by the potential barrier created by the negatively charged (repulsive) trap. When the trap is positioned at the drain end of the channel, the barrier effect on carrier transport is smaller and screening (for small drain bias) and the absence of screening (at large drain bias due to the presence of pinch-off region) determine whether current will not be degraded or will be degraded, respectively. Additionally, the simulations reveal that the degradation characteristics are worse for the case of two traps in close proximity when compared to a single trap case at the same relative trap position because two traps in close proximity generate higher Coulomb potential barrier in the vicinity of the trap's interaction zone with the carriers, impending transport of carriers in the channel from source to drain region of the MOSFET. Twenty random dopant configurations are used for each trap position. We find that this size of the statistical sample is sufficient to give reliable and physically meaningful results.

Original languageEnglish (US)
Title of host publication2010 14th International Workshop on Computational Electronics, IWCE 2010
Pages231-234
Number of pages4
DOIs
StatePublished - 2010
Event2010 14th International Workshop on Computational Electronics, IWCE 2010 - Pisa, Italy
Duration: Oct 26 2010Oct 29 2010

Other

Other2010 14th International Workshop on Computational Electronics, IWCE 2010
CountryItaly
CityPisa
Period10/26/1010/29/10

Fingerprint

Carrier transport
Drain current
Threshold voltage
Screening
Doping (additives)
Degradation
Oxide semiconductors

Keywords

  • Coulomb potential well due to one trap and two traps
  • Fluctuation in drain current and threshold voltage
  • Random dopant fluctuation (RDF)
  • Random telegraph signal/noise (RTS/RTN)

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Electrical and Electronic Engineering

Cite this

3D ensemble Monte Carlo device simulations of random trap induced degradation in drain current and in threshold voltage in the presence of random dopant distributions for 45 nm gate length MOSFETs. / Ashraf, Nabil; Vasileska, Dragica.

2010 14th International Workshop on Computational Electronics, IWCE 2010. 2010. p. 231-234 5677974.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ashraf, N & Vasileska, D 2010, 3D ensemble Monte Carlo device simulations of random trap induced degradation in drain current and in threshold voltage in the presence of random dopant distributions for 45 nm gate length MOSFETs. in 2010 14th International Workshop on Computational Electronics, IWCE 2010., 5677974, pp. 231-234, 2010 14th International Workshop on Computational Electronics, IWCE 2010, Pisa, Italy, 10/26/10. https://doi.org/10.1109/IWCE.2010.5677974
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AB - We investigate the influence of a single trap and two traps in close proximity located at the semiconductor/oxide interface (positioned in the middle portion of the gate width and gradually moved from the source end to the drain end of the channel). We find that when the trap is located at the source end of the channel, the threshold voltage and the magnitude of the drain current are dominated by the potential barrier created by the negatively charged (repulsive) trap. When the trap is positioned at the drain end of the channel, the barrier effect on carrier transport is smaller and screening (for small drain bias) and the absence of screening (at large drain bias due to the presence of pinch-off region) determine whether current will not be degraded or will be degraded, respectively. Additionally, the simulations reveal that the degradation characteristics are worse for the case of two traps in close proximity when compared to a single trap case at the same relative trap position because two traps in close proximity generate higher Coulomb potential barrier in the vicinity of the trap's interaction zone with the carriers, impending transport of carriers in the channel from source to drain region of the MOSFET. Twenty random dopant configurations are used for each trap position. We find that this size of the statistical sample is sufficient to give reliable and physically meaningful results.

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