We investigate the influence of a single trap and two traps in close proximity located at the semiconductor/oxide interface (positioned in the middle portion of the gate width and gradually moved from the source end to the drain end of the channel). We find that when the trap is located at the source end of the channel, the threshold voltage and the magnitude of the drain current are dominated by the potential barrier created by the negatively charged (repulsive) trap. When the trap is positioned at the drain end of the channel, the barrier effect on carrier transport is smaller and screening (for small drain bias) and the absence of screening (at large drain bias due to the presence of pinch-off region) determine whether current will not be degraded or will be degraded, respectively. Additionally, the simulations reveal that the degradation characteristics are worse for the case of two traps in close proximity when compared to a single trap case at the same relative trap position because two traps in close proximity generate higher Coulomb potential barrier in the vicinity of the trap's interaction zone with the carriers, impending transport of carriers in the channel from source to drain region of the MOSFET. Twenty random dopant configurations are used for each trap position. We find that this size of the statistical sample is sufficient to give reliable and physically meaningful results.