TY - GEN
T1 - 33-200Mbps, 3pJ/bit true random number generator based on CT delta-sigma modulator
AU - Chandrasekaran, Sanjeev Tannirkulam
AU - Jayaraj, Akshay
AU - Ramesh, Naveen
AU - Sanyal, Arindam
N1 - Funding Information:
This work is supported by Semiconductor Research Corporation (SRC) task # 2712.020 through The University of Texas at Dallas- Texas Analog Center of Excellence (TxACE).
Funding Information:
ACKNOWLEDGMENT This work is supported by Semiconductor Research Corporation (SRC) task # 2712.020 through The University of Texas at Dallas’ Texas Analog Center of Excellence (TxACE).
Publisher Copyright:
© 2021 IEEE
PY - 2021
Y1 - 2021
N2 - This work presents a true random number generator (TRNG) that uses noise and jitter in a continuous-time, delta-sigma modulator (CTDSM) as entropy source. A multi-bit non-return-to-zero (NRZ) feedback digital-to-analog converter (DAC) ensures that input swing seen by the front-end integrators is small and dominated by CTDSM noise and jitter, thus allowing the proposed circuit to simultaneously operate as both CTDSM and TRNG which is a key differentiation of this work compared to state-of-the-art TRNGs. Voltage controlled ring oscillators are used to implement integrators in the proposed CTDSM. Fabricated in 65nm CMOS, the TRNG has an energy efficiency of 3pJ/bit at throughput of 33Mbps and 3.5pJ/bit at 200Mbps, and passes all NIST tests with a minimum pass rate> 0.96. The measured minimum entropy of the TRNG bits is > 0.9995 across multiple chips and voltage/temperature corners without any calibration.
AB - This work presents a true random number generator (TRNG) that uses noise and jitter in a continuous-time, delta-sigma modulator (CTDSM) as entropy source. A multi-bit non-return-to-zero (NRZ) feedback digital-to-analog converter (DAC) ensures that input swing seen by the front-end integrators is small and dominated by CTDSM noise and jitter, thus allowing the proposed circuit to simultaneously operate as both CTDSM and TRNG which is a key differentiation of this work compared to state-of-the-art TRNGs. Voltage controlled ring oscillators are used to implement integrators in the proposed CTDSM. Fabricated in 65nm CMOS, the TRNG has an energy efficiency of 3pJ/bit at throughput of 33Mbps and 3.5pJ/bit at 200Mbps, and passes all NIST tests with a minimum pass rate> 0.96. The measured minimum entropy of the TRNG bits is > 0.9995 across multiple chips and voltage/temperature corners without any calibration.
KW - Analog-to-digital converter
KW - Delta-sigma
KW - True random number generator
KW - Voltage-controlled oscillator
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U2 - 10.1109/ISCAS51556.2021.9401507
DO - 10.1109/ISCAS51556.2021.9401507
M3 - Conference contribution
AN - SCOPUS:85109015321
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Y2 - 22 May 2021 through 28 May 2021
ER -