TY - GEN
T1 - 3-D simulation of geometrical variations impact on nanoscale FinFETs
AU - Yu, Shimeng
AU - Zhao, Yuning
AU - Song, Yuncheng
AU - Du, Gang
AU - Kang, Jinfeng
AU - Han, Ruqi
AU - Liu, Xiaoyan
N1 - Copyright:
Copyright 2012 Elsevier B.V., All rights reserved.
PY - 2008
Y1 - 2008
N2 - Intra-die fluctuations in the nanoscale CMOS technology emerge inherently to geometrical variations such as line edge roughness (LER) and oxide thickness fluctuations (OTF). A full 3-D statistical simulation is presented to investigate the impact of geometrical variations on the FinFETs performance. In this work, roughness is introduced by a Fourier analysis of the power spectrum of Gaussian autocorrelation function. The influence of different geometrical variation sources is compared and summarized. The results shows that FinFETs performance is most sensitive to the fin LER, which causes a remarkable shift and fluctuations in threshold voltage, drain induced barrier lower effect (DIBL) and leakage current. The impact of gate LER follows that of fin LER. The simulation also suggests quantum confinement effect accounts for the aggressive fluctuations due to fin LER.
AB - Intra-die fluctuations in the nanoscale CMOS technology emerge inherently to geometrical variations such as line edge roughness (LER) and oxide thickness fluctuations (OTF). A full 3-D statistical simulation is presented to investigate the impact of geometrical variations on the FinFETs performance. In this work, roughness is introduced by a Fourier analysis of the power spectrum of Gaussian autocorrelation function. The influence of different geometrical variation sources is compared and summarized. The results shows that FinFETs performance is most sensitive to the fin LER, which causes a remarkable shift and fluctuations in threshold voltage, drain induced barrier lower effect (DIBL) and leakage current. The impact of gate LER follows that of fin LER. The simulation also suggests quantum confinement effect accounts for the aggressive fluctuations due to fin LER.
UR - http://www.scopus.com/inward/record.url?scp=60649101907&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=60649101907&partnerID=8YFLogxK
U2 - 10.1109/ICSICT.2008.4734551
DO - 10.1109/ICSICT.2008.4734551
M3 - Conference contribution
AN - SCOPUS:60649101907
SN - 9781424421855
T3 - International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT
SP - 408
EP - 411
BT - ICSICT 2008 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology Proceedings
T2 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008
Y2 - 20 October 2008 through 23 October 2008
ER -