Security Assurance in a Shared Hardware Architecture Phase 3

Project: Research project

Project Details


Security Assurance in a Shared Hardware Architecture Phase 3 Security Assurance in a Shared Hardware Architecture Phase 3 Executive Summary The current model of separate instantiations of HPC clusters when working with classified information imposes a significant burden that is reflected in the final of products. The total utilization activity on a given HPC cluster is a small percentage of the available computer cycles. Consolidating the computing environment into a leveraged Separately Accredited Network service will reduce the amount of hardware purchased and the number of support personnel required. Research conducted in 2012 identified and prototyped a mechanism for coordinating access to networked resources from mutually untrusted HPC applications that share a multiprocessor computing platform. This access includes capabilities to receive, as well as send information over a network among entities of a trusted group, deny access to non-trusted members, and/or to control access to network storage through the issuance of a temporary locking mechanism. The plan for 2013 is to: Extend the prototype to the BlueCenter HPC implementation in the ASU Impact Lab Improve code for scalability and performance Implement dynamic and priority scheduling of time windows Concentrate on Ethernet communication with possible extension to the InfiniBand network backplane. Deploy the solution inside RMS on a selected set of unclassified applications File full patent disclosure
Effective start/end date2/15/132/28/14


  • INDUSTRY: Domestic Company: $60,000.00


Explore the research topics touched on by this project. These labels are generated based on the underlying awards/grants. Together they form a unique fingerprint.