To decrease the costs of photovoltaics-generated electricity below $1/Wp installed, the 2012 International Technology Roadmap for Photovoltaics (ITRPV) calls for thinner silicon substrates, less silver metallization per cell, and reduced recombination losses at the front and rear, with cell efficiencies for crystalline silicon between 20% and 24% by 2020. The roadmap emphasizes the need for new cell concepts suitable for achieving high efficiencies on thin wafers. Schottky barrier junction cells can provide both simplified low temperature processing and high efficiencies when Fermi level pinning at the metal-semiconductor interface is prevented. Only recently have both knowledge and processing techniques emerged that result in measured record-high Schottky barrier heights that reflect the known work function differences between metals and silicon. It therefore becomes possible to explore application of these techniques to create an interdigitated back point contact Schottky barrier based silicon solar cell with efficiency greater than 20% and target demonstrating laboratory cells with a process compatible with high volume solar cell manufacturing.
|Effective start/end date||9/1/13 → 8/31/17|
- National Science Foundation (NSF): $388,725.00