CCF-SHF: CSR: Small: Compilation for Multi-Core Processors with Limited Local Memories

CCF-SHF: CSR: Small: Compilation for Multi-Core Processors with Limited Local Memories CCF-SHF: CSR: Small: Compilation for Multi-Core Processors with Limited Local Memories Multi-core processors are no longer an option! they are inevitable. We will be compelled to use them, as multi-cores provide the only way to continue improving peak performance without much increase in the power consumption. However, we still face serious challenges not only in how to express the parallelism in the application, but also in exploiting the available parallelism by efficient application management on modern multi-core architectures. We observe that futuristic multi-core processors and project that future multi-core processors, will not support memory virtualization in the hardware. This is not only because cache coherency protocols do not scale to 100s or 1000s of cores, but automatic management consumes significant energy budget of the processor. The burden of memory management is being pushed to the software levels. This proposal will develop much needed tools and techniques to automatically manage the limited local memories present in each of the cores of a multi-core processor. The main objective is to relieve application programmer of the burden of carefully crafting the application, and dividing and mapping it onto the cores to ensure its correct execution and portability. REU Supplement: CCF-SHF: CSR: Small: Compilation for Multi-core Processors with Limited Local Memories PI currently has a funded NSF grant: CCF-0916652 Compilation for Multi-core Processors with Limited Local Memories. This proposal seeks REU supplemental funding for two undergraduate students to work on developing demanding image processing and gaming applications on the IBM Cell processor. This project will enhance the project by demonstrating the effectiveness of our techniques on realistic use-cases, and at the same time provide unique challenges and research experiences for the participating undergraduate students. The IBM Cell processor is a very good example of a scalable memory design, which seems to be very promising as we scale the number of cores in a processor. Application development on such processors involves not only partitioning and parallelizing the functionality of the application, but also requires explicit memory management by the user. The objective of the main grant is to come up with a small set of intuitive changes that the programmer must make in order to enable efficient execution of a multi-threaded application on such limited local memory processors. As a part of the main grant, we are developing tools and techniques to enable this, and automate it to as much extent as possible. While we are using standard benchmarks to demonstrate our techniques, this REU will take us one step further: by demonstrating the need and effectiveness of our techniques for real-world demanding applications. Undergraduate students will benefit from this engagement by not only learning parallel programming, but also concepts of explicit memory management in applications, which is already and will become increasingly important skill, as we scale to ten to hundred-core processors.