A Built-In Self Calibration Approach for DACs

A Built-In Self Calibration Approach for DACs A Built-In Self Calibration Approach for DACs Dr. Bakkaloglu, Arizona State University SOW: 1. Architect, Design and Layout a Sigma-Delta ADC 2. Work with BAE to refine ADC specs. 3. Period of Performance: 18 months. Estimated Start Date: 1 Dec 2012. 4. Preliminary Design Review (PDR) 12 months ARO 5. Layout ADC, extract parasitics, re-optimize design, final verification 6. Final Design Review (FDR) 18 months ARO Deliverables: 1. CAD database: cadence schematics, LVS/DRC clean layouts, test benches 2. GDSII 3. ASU will provide the following deliverable reports: A. Monthly status reports are due on or before the 5th of each month following the month of the reporting period. Status reports will include: a. Milestone achievements b. Actual schedule vs. planned schedule c. Recovery plan for any cost and/or schedule slips d. Risks B. Quarterly Technical Status Report. This Quarterly Technical Status Report will contain power point charts with detailed annotated notes describing the technical progress made for the quarter. This report will be due by the 10th day of the month following the calendar year quarter. C. Program Review Briefing Materials. The briefing materials will contain information as required per customer requirements / meeting agenda. This information will be due one week prior to scheduled reviews