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Personal profile

Education/Academic qualification

PHD, University of California-Berkeley

… → 2002

MA, University of California-Berkeley

… → 1999

BS, Peking University

… → 1996

Fingerprint Fingerprint is based on mining the text of the experts' scientific documents to create an index of weighted terms, which defines the key subjects of each individual researcher.

  • 14 Similar Profiles
Networks (circuits) Engineering & Materials Science
Aging of materials Engineering & Materials Science
Transistors Engineering & Materials Science
Degradation Engineering & Materials Science
Data storage equipment Engineering & Materials Science
Electric potential Engineering & Materials Science
Circuit simulation Engineering & Materials Science
Digital circuits Engineering & Materials Science

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Research Output 1999 2018

Accelerated BTI degradation under stochastic TDDB effect

Patra, D., Reza, A. K., Katoozi, M., Cannon, E. H., Roy, K. & Cao, Y., May 25 2018, 2018 IEEE International Reliability Physics Symposium, IRPS 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-March. p. 5C.51-5C.54

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Degradation
Networks (circuits)
Calibration

Adaptive accelerated aging for 28 nm HKMG technology

Patra, D., Reza, A. K., Hassan, M. K., Katoozi, M., Cannon, E. H., Roy, K. & Cao, Y., Jan 1 2018, In : Microelectronics Reliability. 80, p. 149-154 6 p.

Research output: Contribution to journalArticle

Aging of materials
Metals
metals
degradation
Degradation
8 Citations (Scopus)

ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler

Ma, Y., Suda, N., Cao, Y., Vrudhula, S. & Seo, J., Jan 1 2018, (Accepted/In press) In : Integration, the VLSI Journal.

Research output: Contribution to journalArticle

Learning algorithms
Field programmable gate arrays (FPGA)
Neural networks
Throughput
Hardware
1 Citation (Scopus)

Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations

Yin, S., Venkataramanaiah, S. K., Chen, G. K., Krishnamurthy, R., Cao, Y., Chakrabarti, C. & Seo, J., Mar 23 2018, 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1-4 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

spiking
Backpropagation
hardware
Chemical activation
activation

Algorithm-hardware co-design of single shot detector for fast object detection on FPGAs

Ma, Y., Zheng, T., Cao, Y., Vrudhula, S. & Seo, J., Nov 5 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2018 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., a57

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Detectors
Hardware
Image classification
Digital circuits

Projects 2002 2022