Yu Cao

Personal profile

Education/Academic qualification

PHD, University of California-Berkeley

… → 2002

MA, University of California-Berkeley

… → 1999

BS, Peking University

… → 1996

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19 Similar Profiles

Networks (circuits) Engineering & Materials Science

Aging of materials Engineering & Materials Science

Transistors Engineering & Materials Science

Degradation Engineering & Materials Science

Data storage equipment Engineering & Materials Science

Electric potential Engineering & Materials Science

Circuit simulation Engineering & Materials Science

Digital circuits Engineering & Materials Science

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Research Output 1999 2019

7770 Citations
41 h-Index
171 Conference contribution
101 Article
8 Chapter
3 Editorial
6 More

A 1.06-μW Smart ECG Processor in 65-nm CMOS for Real-Time Biometric Authentication and Personal Cardiac Monitoring

Yin, S., Kim, M., Kadetotad, D., Liu, Y., Bae, C., Kim, S. J., Cao, Y. & Seo, J., Aug 1 2019, In : IEEE Journal of Solid-State Circuits. 54, 8, p. 2316-2326 11 p., 8713394.

Research output: Contribution to journal › Article

Biometrics

Electrocardiography

Authentication

Monitoring

Neural networks

Corrigendum: Large-scale neuromorphic spiking array processors: A quest to mimic the brain (Frontiers in Neuroscience (2018) 12 (891) DOI: 10.3389/fnins.2018.00891)

Thakur, C. S., Molin, J. L., Cauwenberghs, G., Indiveri, G., Kumar, K., Qiao, N., Schemmel, J., Wang, R., Chicca, E., Hasler, J. O., Seo, J., Yu, S., Cao, Y., Van Schaik, A. & Etienne-Cummings, R., Jan 1 2019, In : Frontiers in Neuroscience. 13, JAN, 991.

Research output: Contribution to journal › Comment/debate

Open Access

Neurosciences

Neurons

Neuronal Plasticity

Brain

corrigendum

Towards efficient neural networks on-a-chip: Joint hardware-algorithm approaches

Du, X., Krishnan, G., Mohanty, A., Li, Z., Charan, G. & Cao, Y., Mar 1 2019, China Semiconductor Technology International Conference 2019, CSTIC 2019. Lin, Q., Lai, K., Claeys, C., Liang, S., Song, P., Yu, W., Wu, H., Qu, X., Lung, H-L., Huang, R., Guo, Z. & Zhang, Y. (eds.). Institute of Electrical and Electronics Engineers Inc., 8755608. (China Semiconductor Technology International Conference 2019, CSTIC 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

hardware

chips

Neural networks

Hardware

Data storage equipment

2 Citations (Scopus)

Accelerated BTI degradation under stochastic TDDB effect

Patra, D., Reza, A. K., Katoozi, M., Cannon, E. H., Roy, K. & Cao, Y., May 25 2018, 2018 IEEE International Reliability Physics Symposium, IRPS 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-March. p. 5C.51-5C.54

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Degradation

Networks (circuits)

Calibration

Adaptive accelerated aging for 28 nm HKMG technology

Patra, D., Reza, A. K., Hassan, M. K., Katoozi, M., Cannon, E. H., Roy, K. & Cao, Y., Jan 1 2018, In : Microelectronics Reliability. 80, p. 149-154 6 p.

Research output: Contribution to journal › Article

Aging of materials

Metals

metals

degradation

Degradation